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Senior IP Design Engineer
Category: Computing, Publishing
  • Your pay will be discussed at your interview

Job code: lhw-e0-78928959

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  Job posted:   Wed Oct 18, 2017
  Distance to work:   ? miles
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Senior IP Design Engineer

# Senior IP Design Engineer

Job Number: 113154663

Santa Clara Valley, California, United States

Posted: 17-Oct-2017

Weekly Hours: 40.00

**Job Summary**

In this highly visible role, you will be at the center of a multimedia IP design effort interfacing with all disciplines, with a critical impact on getting functional products to millions of customers quickly.

**Key Qualifications**

* The ideal candidate will have 5+ years of experience in multimedia IP/SoC design

* Previous experience in control centric, high performance high throughput designs with deep pipelines and complex flow and data structures, especially with multimedia applications

* Good understanding of system and fabric interface, arbitration, buffer/queue sizing and management, and bandwidth or throughput performance analysis

* Familiar with common on-chip bus protocols such as AMBA (AXI, AHB, APB) Experience in frontend implementation tasks such as synthesis, sta, logic equivalence

* Industry exposure to and knowledge of ASIC/FPGA design methodology Excellent collaboration skills

* Outstanding written and verbal communications


As a senior IP Design engineer you will have responsibilities spanning all aspects of multimedia IP design

Collaborate with platform architecture team to define, analyze, and document micro-architecture specifications

Perform feasibility analysis on suggested architecture(s) and algorithm(s)

Perform RTL design and logic implementation of agreed architecture

Perform front end implementation tasks such as synthesis, logic equivalence check, STA


BSEE / MSEE is required

**Additional Requirements**

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